Hello!
I use a reference svs assemble to test delly.
First, I generate a set of svs (you can see it in the accessory named ref_sv.sort) and then I convert the ref_sv.sort to dwgsim input formate( you can get it in the accessory named sv_info).
Then I use the commande "dwgsim -e 0 -E 0 -d 200 -s 20 -C 30 -1 35 -2 35 -r 0 -R 0 -X 0 -y 0 -m sv_info 0_chrX.fa zz"(0_chrX.fa is the reference sequence of 10Mb , zz is the prefix of the dwgsim output files) to generate pair-end library.
Then I use bwa and samtools to to generate the sorted bam file.
Finally I use the command "delly 1_sv_chrx.bam" , but the sum of true positive svs is only 3.
I'm very confused! It's too different from your result. There must be something wrong with my operation.
Please help me.
Thank you very much!
I use a reference svs assemble to test delly.
First, I generate a set of svs (you can see it in the accessory named ref_sv.sort) and then I convert the ref_sv.sort to dwgsim input formate( you can get it in the accessory named sv_info).
Then I use the commande "dwgsim -e 0 -E 0 -d 200 -s 20 -C 30 -1 35 -2 35 -r 0 -R 0 -X 0 -y 0 -m sv_info 0_chrX.fa zz"(0_chrX.fa is the reference sequence of 10Mb , zz is the prefix of the dwgsim output files) to generate pair-end library.
Then I use bwa and samtools to to generate the sorted bam file.
Finally I use the command "delly 1_sv_chrx.bam" , but the sum of true positive svs is only 3.
I'm very confused! It's too different from your result. There must be something wrong with my operation.
Please help me.
Thank you very much!